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? semiconductor components industries, llc, 2009 june, 2009 ? rev. 0 1 publication order number: IR3638/d IR3638 high frequency synchronous step down pwm controller for tracking applications the IR3638 controller ic is designed to provide a simple synchronous buck regulator for on ? board dc to dc applications in a 14 ? pin soic. the IR3638 is designed specifically for tracking applications by providing the track input. the IR3638 operates at a fixe d internal 400 khz switching frequency allowing the use of small external components. the device features a programmable soft start set by an external capacitor, under ? voltage lockout and output under ? voltage detection that latches off the device when an output short is detected. features ? power up sequencing / tracking ? enable input ? internal 400 khz oscillator ? programmable soft ? start ? fixed frequency voltage mode applications ? tracking applications ? game consoles ? computing peripheral voltage regulators ? graphics cards ? general dc to dc converters figure 1. typical application circuit soic ? 14 d suffix case 751a IR3638g awlyww a = assembly location wl = wafer lot y = year ww = work week g = pb ? free package marking diagram pin connections http://onsemi.com see detailed ordering and shipping information in the package dimensions section on page 12 of this data sheet. ordering information 1 14 (top view) nc ss comp nc vc hdrv pgnd ldrv gnd nc vcc nc vp fb 1 1
IR3638 http://onsemi.com 2 circuit description: block diagram figure 2. simplified block diagram vc hdrv delay vcc delay ldrv pgnd fault fault 2v ss pwm por reset dom gnd vcc ss vp/en comp fb 25 k 25 k 22 a 64 a max error amp v bias v cc uvlo 0.65 v c t 0.4 v vp/en por por oscillator error comparator por por r s q r s q
IR3638 http://onsemi.com 3 table 1. pin function description pin name description 1 fb inverting input to the error amplifier. this pin is connected to the output of the regulator via resistor divider to set the output voltage and provide feedback to the error amplifier. 2 vp/en dual function pin. non inverting input to the error amplifier. enable input. 3 nc no connect 4 vcc this pin provides power for the internal blocks of the ic as well as powers the low side driver. a minimum of 0.1 f, high frequency capacitor must be connected from this pin to power ground. 5 nc no connect 6 ldrv output driver for low side mosfet. 7 gnd ic ground for internal control circuitry. 8 pgnd power ground. this pin serves as a separate ground for the mosfet drivers and should be connected to the system?s power ground plane. 9 hdrv output driver for high side mosfet. the negative voltage at this pin may cause instability for the gate drive circuit. to prevent this, a low forward voltage drop diode (e.g. bat54 or 1n4148) is required between this pin and power ground. 10 vc this pin powers the high side driver. 11 nc no connect 12 comp output of error amplifier. an external resistor and capacitor network is typically connected from this pin to ground to provide loop compensation. 13 ss soft start. this pin provides user programmable soft ? start function. connect an external capacitor from this pin to ground to set the start up time of the output voltage. 14 nc no connect table 2. absolute maximum ratings rating symbol min max unit main supply voltage input v cc ? 0.3 20 v main supply voltage input 200 ns wide spikes, 400 khz v cc_spk ? 0.3 22 v supply voltage for the high side driver v c ? 0.3 20 v supply voltage for the high side driver 200 ns wide spikes, 400 khz v c_spk ? 0.3 22 v vp/en pin voltage v p/en ? 0.3 10 or v cc (note 1) v fb pin voltage v fb ? 0.3 10 or v cc (note 1) v rating symbol value unit thermal resistance, junction ? to ? ambient (note 2) r thja 90 k/w storage temperature range t stg ? 65 to 150 c junction operating temperature t j 0 to 150 c esd withstand voltage (note 3) human body model machine model v esd 2.0 200 kv v moisture sensitivity level msl jedec level 1 @ 260 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. note: all voltages are referenced to gnd pin unless otherwise stated. 1. maximum = 10 v or v cc , whichever is lower. 2. jedec high ? k model 3. this device series contains esd protection and exceeds the following tests: human body model (hbm) 2.0 kv per jedec standard: jesd22 ? a114 machine model (mm) 200 v per jedec standard: jesd22 ? a115
IR3638 http://onsemi.com 4 table 3. recommended operating conditions symbol definition min max units v cc supply voltage 7 20 v v c supply voltage converter voltage + 5 v, (note 4 ) 20 v t j junction temperature 0 125 c note: all voltages are referenced to gnd pin. 4. depend on high side mosfet v gs table 4. electrical specifications unless otherwise specified, v cc = v c = 12 v, 0 c < t j < 125 c parameter symbol test condition min typ max units supply current v cc supply current (static) i cc(static) v p/en = 0 v, no switching 1.5 5 ma v cc supply current (dynamic) i cc(dynamic) f sw = 400 khz, c l = 1.5 nf 10 15 ma v c supply current (static) i c(static) v p/en = 0 v, no switching 0.1 1 ma v c supply current (dynamic) i c(dynamic) f sw = 400 khz, c l = 1.5 nf 9 15 ma under voltage lockout v cc ? start ? threshold v cc uvlo (r) supply voltage rising 6.3 6.6 7.0 v v cc ? stop ? threshold v cc uvlo (f) supply voltage falling 6.0 6.3 6.6 v v cc ? hysteresis v cc (hyst) supply ramping up and down 0.2 0.3 0.4 v enable ? start ? threshold v p/en uvlo (r) supply voltage rising 0.6 0.65 0.7 v enable ? stop ? threshold v p/en uvlo (f) supply voltage falling 0.56 0.6 0.66 v enable ? hysteresis v p/en (hyst) supply ramping up and down 25 42.5 60 mv fb uvlo v fb uvlo fb ramping down 0.3 0.4 0.5 v oscillator frequency f sw 360 400 440 khz ramp amplitude v ramp (note 5) 1.25 v min duty cycle d min v fb =1v, v p/en = 0.8 v 0 % max duty cycle d max f sw = 400 khz, v fb = 0.6 v, v p/en = 0.8 v 81 85 95 % error amplifier fb input bias current i fb1 v ss = 3 v ? 0.1 ? 0.5 a fb input bias current i fb2 v ss = 0 v 64 a vp/en input bias current i vp/en v ss = 3 v ? 0.1 ? 0.5 a transconductance gm 440 1300 mho input offset voltage v os v p/en = 0.8 v, v comp = 2.0 v ? 6 0 +6 mv vp/en common mode range v comn (note 5) 0.6 1.5 v error amplifier design specifications ota output current i ota (sink) v fb = 1.2 v, v p/en = 1.0 v, v comp = 2.0 v, (note 5) 100 a ota output current i ota (source) v fb = 0.8 v, v p/en = 1.0 v, v comp = 2.0 v, (note 5) 100 a 5. guaranteed by design but not tested in production.
IR3638 http://onsemi.com 5 table 5. electrical specifications unless otherwise specified, v cc = v c = 12 v, 0 c < t j < 125 c parameter symbol test condition min typ max units soft start soft start current i ss v ss = 0 v 12 22 32 a soft start turn on ss (on) 1.8 2 2.2 v output drivers lo drive rise time tr(lo) c l = 1.5 nf (see figure 3) 30 60 ns hi drive rise time tr(hi) c l = 1.5 nf (see figure 3) 30 60 ns lo drive fall time tf(lo) c l = 1.5 nf (see figure 3) 30 60 ns hi drive fall time tf(hi) c l = 1.5 nf (see figure 3) 30 60 ns dead band time t dead (see figure 3) 35 90 150 ns deadband h to l deadband l to h low side driver (ldrv) 2 v 9 v 9 v 2 v figure 3. definition of rise/fall time and deadband time t f t dead t r t dead t f t r high side driver (hdrv) typical characteristics figure 4. v cc uvlo temperature ( c) 120 100 80 60 40 20 0 6.00 6.10 6.20 6.40 6.50 6.70 6.80 7.00 v cc (v) 6.30 6.60 6.90 rising falling
IR3638 http://onsemi.com 6 typical characteristics figure 5. v p/en uvlo figure 6. fb uvlo temperature ( c) temperature ( c) 120 100 80 60 40 20 0 0.56 0.58 0.60 0.62 0.64 0.66 0.68 0.70 120 100 80 60 40 20 0 0.30 0.32 0.34 0.38 0.40 0.44 0.48 0.50 figure 7. maximum duty cycle figure 8. switching frequency temperature ( c) temperature ( c) 120 100 80 60 40 20 0 81 83 85 87 89 91 93 95 120 100 80 60 40 20 0 360 370 380 390 400 410 430 440 figure 9. error amplifier transconductance figure 10. deadtime temperature ( c) temperature ( c) 120 100 80 60 40 20 0 400 500 600 700 900 1000 1100 1300 120 100 80 60 40 20 0 30 50 70 90 110 130 150 v p/en (v) v fb (v) d max (%) f sw (khz) gm ( mho) t (ns) rising falling 0.36 0.42 0.46 420 800 1200 high to low low to high
IR3638 http://onsemi.com 7 detailed description introduction the IR3638 is voltage mode pwm synchronous controller designated to drive two external n-channel mosfets. switching frequency is fixed at 400 khz. output voltage is determined by feedback resistor divider and external reference voltage. reference voltage input can be used to enabling and disabling operation and for tracking function. under-voltage lockout the undervoltage lockout circuit ensures that the ic does not start and work until v cc and v p/en are over set thresholds. if t hese conditions are not fulfilled output drivers are in the off state. disable function the output voltage can be disabled by pulling the vp/en pin below 0.6 v. at this time are output drivers in the off state. output voltage output voltage can be set by an external resistor divider and external reference voltage at vp/en pin according to equation (1): v out v p en 1 r1 r2 (eq. 1) where v p/en is the external reference voltage at vp/en pin that is connected to noninverting input of error amplifier. r1 and r2 resistors create voltage divider from output to fb pin that is connected to inverting input of error amplifier. absolute values of resistors r1 and r2 depend on the compensation network type. see discussion of compensation description for details. inductor selection the inductor selection is based on the output power, frequency, input and output voltages, and efficiency requirements. high inductor values cause low current ripple, slower transient response, higher efficiency and increased size. inductor design can be reduced to desired maximum current ripple in the inductor. it is good to have current ripple ( i lmax ) between 20% and 50% of the output current. for a buck converter, the inductor should be chosen according to equation (2). l v out f sw i lmax 1 v out v inmax (eq. 2) output capacitor selection the output voltage ripple and transient requirements determine the output capacitor type and value. the important parameter for the selection of the output capacitor is equivalent serial resistance (esr). if the capacitor has low esr, it often has sufficient capacity for filtering as well as an adequate rms current rating. the value of the output capacitor should be calculated using the following equation: c out i l 8 f sw ( v out i l esr) (eq. 3) for a higher switching frequency, it is suitable to use a multilayer ceramic capacitor (mlcc) with very low esr. the advantages are small size, low output voltage ripple and fast transient response. the disadvantage of the mlcc type is the requirement to use a type iii compensation network. input capacitor selection the input capacitor is used to supply current pulses while the high side mosfet is on. when the mosfet is off, the input capacitor is being char ged. the value of this capacitor can be selected with the equation (4): c in i out v out v in 1 v out v in f sw v in (eq. 4) where v in is the input voltage ripple and the recommended value is about 2?5% of v in . the input capacitor must be able to handle the input ripple current. its value should be calculated using equation (5): i rms i out v out 1 v out v in v in
(eq. 5) power mosfet selection the IR3638 uses two n-channel mosfets. they can be primarily selected according to r ds(on) , maximum drain to source voltage, and gate charge. r ds(on) impacts conductive losses and gate char ge impacts switching losses. the low side mosfet is selected primarily for conduction losses, and the high side mosfet is selected to reduce switching losses especially when the output voltage is less than 30% of the input voltage. the drain to source breakdown voltage must be higher than the maximum input voltage. conductive power losses can be calculated using the following equations (6) and (7): p cond ? highfet i out 2 r ds(on) v out v in (eq. 6) p cond ? lowfet i out 2 r ds(on) 1 v out v in (eq. 7) switching losses are dependent on the drain to source voltage at turn-off state, output current, and switch-on and switch-off times, as is shown by equation (8). p sw v ds(off) 2 (t on t off ) f sw i out (eq. 8) t on and t off times are dependent on the transistor gate charge.
IR3638 http://onsemi.com 8 the mosfet output capacitance loss is caused by the charging and discharging during the switching process and can be computed using equation (9). p coss c oss v in 2 f sw 2 (eq. 9) where c oss = c ds + c gs. some power dissipation is caused by the reverse recovery charge in the low side mosfet body diode, which conducts at dead time. this charge is needed to close the diode. the current from the input power supply flows through the high side mosfet to the low side mosfet body diode. this power dissipation can be calculated using the following equation (10): p qrr q rr v in f sw (eq. 10) q rr is the diode recovery charge as given in the manufacturer?s datasheet. for some types of mosfets, this dissipation may be dominant at high input voltages. it is necessary to take care when selecting a mosfet. an external schottky diode across the low side mosfet can be used to eliminate the reverse recovery charge power loss. the schottky diode?s forward voltage should be lower than that of the body diode, and reverse recovery time (t rr ) should be lower then that of the body diode. the schottky diode?s capacitance loss can be calculated as shown in equation (11). p c(schottky) c schottky v in 2 f sw 2 (eq. 11) figure 11. mosfets timing diagram high side logic signal low side logic signal high side mosfet low side mosfet r dsmax r ds(on)min r dsmax r ds(on)min t dead t dead t f t d(on) t r t d(off) t r t f t d(on) t d(off) r ds the mosfet delay, turn-on and turn-off times must be short enough to prevent cross conduction. if not, there will be cross conduction from the input through both mosfets to ground. due to this fact, the following conditions must be true: t d(on) high t dead t d(off) low t f low (eq. 12) t d(on) low t dead t d(off) high t f high where t dead is the controller dead band time, t d(on) , t r , t d(off) and t f are the mosfet parameters. these parameters can be found in the datasheet for specific conditions. soft start the soft start time is set by a capacitor connected between the ss pin and ground. this function is used for controlling the output voltage slope and limiting start-up currents. the start-up sequence initiates when the power on ready (por) internal signal rises to logic level high. that means the supply voltage and v p/en voltage are over the set thresholds. the soft start capacitor is charged by a 22 a current source. if por is low, the ss pin is internally pulled to gnd, which means that the IR3638 is in a shutdown state. the ss pin voltage (0 v to 2 v) controls the internal current source
IR3638 http://onsemi.com 9 (64 a to 0 a) with a negative linear characteristic. this current source injects current into the resistor (25 k ) connected between the fb pin and the negative input of the error amplifier and into the external feedback resistor network. v oltage drop on these resistors is over 1.6 v, which is enough to force the error amplifier into a negative saturation state and to block switching. when the soft start pin reaches around 1.2 v (exact value depends on feedback and compensation network and on the soft start capacitor; a larger soft start capacitor and a lower compensation capacity decrease this level), the ic starts switching. the impact of the controlled current source decreases and the output voltage starts to rise. when the soft start capacitor voltage reaches 2 v, the output voltage is at nominal value. the soft start time must be at least 10 times longer than the time needed to charge the compensation network from the output of the error amplifier. if the soft start time is not long enough, the soft start sequence would be faster than the charging compensation network and the ic would start without slowly increasing the output voltage. the soft start capacitance can be calculated using equation (13): c ss 22 10 ? 6 t ss (eq. 13) 0 v 2 v 1 v >1.6 v 3 v figure 12. start-up sequence v cc = v c v in v p_en por 0 v v ss v out internal i fb v fb v neg_error_amp v p/en v p/en 64 a start to pre-biased output the IR3638 is able to start up into a pre-biased output capacitor. the low side mosfet does not turn on before the output voltage is at set value. during this time, the energy is not discharged by the low side mosfet (current flows through low side mosfet body diode) until the soft start sequence ends.
IR3638 http://onsemi.com 10 figure 13. start-up to pre-biased output v out v ss v ldrv v hdrv 1 v 2 v 3 v short circuit protection the output of convertor with IR3638 is protected against short circuit conditions. this protection is sensing output voltage through feedback divider on fb pin. on this pin is comparator that compares fb voltage to 0.4 v. if fb voltage is below 0.4 v then ic goes to latch state and switch output drivers to off state. latch state can be released by decrease v cc or v p/en voltage below threshold. output shorted threshold figure 14. short circuit protection (start up, short, latch, latch release and new start-up) v cc or v p/en v out v ss v ldrv v hdrv
IR3638 http://onsemi.com 11 compensation circuit the IR3638 is a voltage mode buck converter with a transconductance error amplifier compensated by an external compensation network. compensation is needed to achieve accurate output voltage regulation and fast transient response. the goal of the compensation circuit is to provide a loop gain function with the highest crossing frequency and adequate phase margin (minimally 45 ). the transfer function of the power stage (the output lc filter) is a double pole system. the resonance frequency of this filter is expressed as follows: f po 1 2 l c out
(eq. 14) one zero of this lc filter is given by the output capacitance and output capacitor esr. its value can be calculated using the following equation: f z0 1 2 c out esr (eq. 15) the next parameter that must be chosen is the zero crossover frequency f 0 . it can be chosen to be 1/10?1/5 of the switching frequency. these three parameters show the necessary type of compensation that can be selected from table 6. table 6. compensation types zero crossover frequency condition compensation type typical output capacitor type f p0 < f z0 < f 0 < f sw /2 type ii (pi) electrolytic, tantalum f p0 < f 0 < f z0 < f sw /2 type iii (pid) method i tantalum, ceramic f p0 < f 0 < f sw /2 < f z0 type iii (pid) method ii ceramic compensation type ii (pi) this compensation is suitable for low-cost electrolytic capacitors. the zero created by the capacitor?s esr is a few khz, and the zero crossover frequency is chosen to be 1/10 of the switching frequency. components of the pi compensation (figure 15) network can be specified by the following equations: figure 15. pi compensation (type ii) + ? ota r2 r1 v p/en v out r c1 c c1 c c2 * *optional r c1 2 f 0 l v ramp v out esr v in v p en gm (eq. 16) c c1 1 0.75 2 f p0 r c1 c c2 1 r c1 f sw r1 v out v p en v p en r2 v ramp is the peak-to-peak voltage of the oscillator ramp, and gm is the transconductance error amplifier gain. capacitor c c2 is optional. compensation type iii (pid) tantalum and ceramic capacitors have lower esr than electrolytic capacitors, so the zero of the output lc filter goes to a higher frequency above the zero crossover frequency. this situation needs to be compensated by the pid compensation network that is shown in figure 16. + ? r1 r2 ota figure 16. pid compensation (type iii) v out v p/en c c2 c c1 r c1 c fb1 r fb1 there are two methods to select the zeros and poles of the compensation network. the first one (method i) is usable for tantalum output capacitors, which have a higher esr than ceramics, and its zeros and poles can be calculated as shown below: f z1 0.75 f p0 (eq. 17) f z2 f p0 f p2 f z0 f p3 f sw 2
IR3638 http://onsemi.com 12 the second one (method ii) is for ceramic capacitors: f z2 f 0 1 sin max 1 sin max
(eq. 18) f z1 0.5 f z2 f p3 0.5 f sw f p2 f 0 1 sin max 1 sin max
the remaining calculations are the same for both methods. r c1 2 gm (eq. 19) c fb1 2 f 0 l v ramp c out v in r c1 c c1 1 2 f z1 r c1 c c2 1 2 f p3 r c1 r fb1 1 2 c fb1 f p2 r1 1 2 c fb1 f z2 r fb1 r2 v p en v out v p en r1 to check the design of this compensation network, the following equation must be true: r1 r2 r fb1 r1 r fb1 r2 r fb1 r1 r2 1 gm (eq. 20) if it is not true, then a higher value of r c1 must be selected. ordering information device package shipping ? IR3638dr2g soic ? 14 (pb ? free) 2500 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
IR3638 http://onsemi.com 13 package dimensions soic ? 14 case 751a ? 03 issue j notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. ? a ? ? b ? g p 7 pl 14 8 7 1 m 0.25 (0.010) b m s b m 0.25 (0.010) a s t ? t ? f r x 45 seating plane d 14 pl k c j m dim min max min max inches millimeters a 8.55 8.75 0.337 0.344 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.228 0.244 r 0.25 0.50 0.010 0.019 7.04 14x 0.58 14x 1.52 1.27 dimensions: millimeters 1 pitch soldering footprint 7x on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 IR3638/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

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